Conventional modern integrated circuits are designed using programmed computers. Such computers are conventionally programmed with Electronic Design Automation (EDA) and Electronic Computer-Aided Design (ECAD) tools. These tools are used to provide both logical and physical synthesis. EDA tools take an abstract representation of a circuit design and transform such a circuit design into an arrangement of logic structures or other structures connected to one another as described by a network list or “netlist.”
A synthesis tool having an understanding of logic and its constraints is given a netlist. As a result, a synthesis tool can direct a placer of a place-and-route tool to keep closely linked logic structures together.
Unfortunately, placer tools are less flexible than needed. During a design process, one or more aspects may change, and conventional placer tools do not allow for sufficient variability without significant re-coding. For example, it would be desirable if a placer tool could more readily accommodate:                a. One or more different architectures, including, but not limited to, new kinds of entities, such as microprocessors, block memories, flip-flops, lookup-tables, among other known logic structures, including one or more different arrangements thereof;        b. One or more different representations for designs and devices;        c. One or more different algorithm-dictated structure requirements, including ability to operate at various levels of abstraction, for example, placement of a group of components that share output as a placer-movable object, and then treating individual components of such a group as placer-movable objects for finer grain improvement;        d. One or more different physical constraint representations, including constraining circuit placement to a particular area of an integrated circuit device or to specific positions in such a device, or prohibiting placement of certain circuits in certain positions, as well as other list constraints and prohibit constraints.        
Accordingly, it would be both desirable and useful to provide means for adding variability, whether with respect to one or more changes to one or more of architecture representation, design representation, algorithm-dictated abstraction or physical constraint representation, to a placer tool to reduce re-coding needed to accommodate such variability.